It was 103 degrees in San Jose last week, but inside the action was even hotter.

We had a terrific time at PCB West. Attendance was up markedly — 26% for the exhibition and 35% for the conference. Signal integrity remains a major area of interest, although during the PCB Designers Roundtable — cosponsored by the good folks from the Silicon Valley Designers Council chapter — it was revealed that perhaps one-third of designers don’t actually perform SI analysis. (It’s left for someone else to do.) Proponents, including the ubiquitous Rick Hartley, stressed that all designers should perform some level of SI.

Also revealed: a large percentage of designers continue to manually route their boards, despite evidence showing autorouters could save time. Whether they do so because they are trying to protect their jobs is certainly understandable, but the notion that autorouting could free up resources that could then be used in other areas (such as SI analysis) bears consideration. 

Many of the technical sessions that accompanied the trade show were packed as designers and process engineers took advantage of the free sessions to glean valuable information on reducing layer counts, thermal management, post-assembly cleaning, and CAD-CAM. In one eye-opening presentation, Don Trenholm of Custom Analytical Services literally ran out of time showing slides of various counterfeited components.

And a quick shout-out to the fellows at SFM Technology, who hail from my hometown of Champaign, IL, and whom I only spoke with for a moment because those pesky customers kept showing up to look at their ECAD-MCAD tools.