I got an email a few weeks back from one of our customers who is with a semiconductor manufacturer for whom we make evaluation boards. He asked some good questions that I answered, of course, and I thought this information may be useful to others, too. Here is what his email said:
Hi Judy, We received the boards today… and they look gorgeous! And of course it leads to a question….. not a negative, not an “inquiry” style question….
One thing that caught my eye was how “flush” the board surfaces were. I wasn’t able to identify a single via on the front or back surfaces of the board…. and (education time) I had an Apps Engr point out that I could see the via plugs by looking at the edge of the EVB. So I want to understand more about the via fill process, and whether there are different options that influence cost and lead time.
I will share with you my brief answers, which are not overly technical. However, I will follow my comments with a link to a very good in-depth paper from Michael Carano of the Electronics Division of the OM Group on this subject. Unfortunately once you start talking about via filling and plugging it is a bit like opening a big can of worms!
First of all, a semantics lesson: There are two methods of filling via holes—one is via “filling” and the other is via “plugging.” Via hole filling refers to the non-planer filling of plated through-holes. Via hole plugging refers to the planarization of blind and buried vias, as well as through holes. Via hole plugging pertains to HDI and microvia designs.
(In the case of the above customer they requested the through-hole vias to be plugged with conductive ink that would facilitate a connection from the front to back sides).
Once the conductive ink has been applied to the holes, the conductive ink must be cured. After curing some of the cured material will protrude from the holes leaving a small bump or “nail-head.” At this point the board must be “brushed” to flatten this protruding bump, with micro precision, to remove the excess material without removing any material from within the via hole. The brushing process must not damage the knee of any unplugged holes. This requires the use of a very flat working surface and special brushes. In some cases there may need to be an additional final cure for hardness. (UV)
Getting back to our customer, we took all these steps to properly fill, cure and planarize the plugged vias. Afterwards, these boards went through final outer layer pattern plating, which further erased any evidence that the plugged vias were present. This made it impossible for our customer to detect any sign of the plugged vias (unless they peered through the side of the board into the substrate where they could see the front to back plugs). I think they were a little worried we forget to plug them at first glance!
As far as how filling verses plugging vias influences cost and lead time—the HDI via filling does take some extra time and TLC and thus raises the cost, and may or may not affect the lead time. Usually you must allow for one full day to complete the via plugging process. Obviously if you need a quick turn, the lead time would be affected. However, if the lead time was standard, it probably wouldn’t make much of a difference. It stands to reason that the quantity also comes into play in regards to time and cost.
Thank you, Bill for asking these questions—they were good ones! We appreciate your kind words and commitment to our partnership. We are thrilled you think our boards are “gorgeous!”
I would also like to thank Michael Carano for his expertise and outstanding paper on the subject of filling and plugging vias that can be found here: http://www.electrochemicals.com/viafill07.pdf