Tag Archives: fabrication

The End of the Viasystems Era

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At long last, the hunter became the hunted.

TTM Technologies today announced its pending acquisition of Viasystems. The deal, expected to close in early 2015, will vault TTM to second place among the world’s largest PCB fabricators.

No matter how the deal turns out for TTM, Viasystems will remain one of the most talked about PCB companies in the industry’s history, held in awe for its audacity and blamed on multiple continents for nearly single-handedly devastating local supply chains.

For the entirety of its 18 years, Viasystems was worth 10 times its revenue in industry controversy and chatter. It sprung on the scene in fall 1996, the brainchild of New York investment firm Hicks, Muse, which in quick order bought up AT&T’s board shop in Virginia, Circo Craft, Kalex, Forward Group, ISL, Mommers and Zinocelere, plus several EMS and peripheral businesses. They were the Yankees of the PCB world, albeit without the same level of success.

Then came the Tech Recession of 2001, and Viasystems’ debt ballooned to over $1 billion. Two Chapter 11 restructurings and countless lawsuits later, the company stabilized and managed to spend the better part of the rest of the decade simply managing the business.

In 2010 the veil was lifted. Viasystems resumed its buying ways, snatching up Merix and then, two years later acquiring DDi (which in turn had gobbled up Coretec). Yet consolidation didn’t bring happiness. Over the years Viasystems found it nearly impossible to turn a consistent profit. Debt, a persistent problem dating to its Hicks, Muse days, now sits at $561 million.

TTM is getting Viasystems for $16.46 per share, or about 6.8 times adjusted EBITDA. You tell me if that’s worth it.

I would expect TTM will sell off Viasystems’ wire harness business, which is small ($174.6 million in 2013) relative to the rest of the business and has shown operating losses in five of the past seven quarters. Viasystems has already consolidated its China manufacturing base, so I would not expect much change there. TTM is running at 75% capacity in China but only 60% in North America. TTM has seven sites in North America and Viasystems has nine, including a combined three in the Silicon Valley and two in Orange County. Perhaps they will seek to consolidate here in order to boost rates.

Viasystems changed the way the world viewed the industry. It forced Wall Street to take notice. It laid waste to the regional landscape, ultimately closing millions of sq. ft. of some of the once-best shops in the world. Some will say this was inevitable. Viasystems bought plants that were obsolete or quickly headed that way, whose workforces could not change even while the technology was quickly shifting away from them. And the firm tied up enormous amounts of capital in dubious debt deals that may have enriched a few but certainly did not leave their business units with the balance sheets necessary to operate in such a cyclical market.

There’s still time for the deal to fall through, and it took about 18 seconds before shareholder lawsuits began piling up. No matter what happens on the ground, come next spring, Viasystems will again occupy the rarest air of the PCB world. It just won’t be as Viasystems.

Open The Pod Bay Doors, HASL

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Does anyone use HASL (hot air surface leveling) anymore? It’s also known as HAL.

Prior to the RoHS days, HASL was probably the most common surface finish. You can get it lead-free, but most boards seem to use immersion silver or ENIG (electroless nickel immersion gold). HASL has traditionally come at a lower cost than those other two finishes, but immersion silver can generally be found at the same price now.

Our friends at Sunstone.com, for example, charge the same for silver and tin/lead HASL. ENIG is still more expensive no matter where you go, though.

One of the chief disadvantages of HASL these days, is the lack of planarity on the surface. (Note the bumps on the BGA land pattern in the image on the right.) With through-hole or large components, an uneven surface doesn’t matter so much. With the increasingly smaller BGAs and QFNs, however, surface irregularities can cause big problems.

Both immersion silver and ENIG have nice flat surfaces. OSP (organic surface preservative) has a pretty flat surface too, but it’s not used much except in high volume consumer goods or specialized applications.

Duane Benson
Oh, the pain! Save me, William.

http://blog.screamingcircuits.com/

Collins Closing

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Count me among those sorry to hear the news that Rockwell is closing its printed circuit board fabrication plant.

I’ve been through that plant and this is sad to see. I wrote a profile of the plant for PC FAB in 2000. At the time, then GM Mike Driscoll was overseeing a major implementation of Lean manufacturing, making the site one of the early adopters of the practice.

I’m of the opinion (minority, probably) that OEMs retaining in-house knowledge and expertise of manufacturing processes is a good thing, even if they can’t necessarily generate a direct profit from it.

That, plus I knew several people who worked in that shop over the years and every one of them is a class act.

There are still a few major OEMs with in-house fab capacity. Let’s hope they see fit to keep it.

 

‘Board Talk’

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Today we launched Board Talk, the bulletin board for the Printed Circuit Board industry, a service brought to you by UP Media Group, Printed Circuit Design & Fab and CIRCUITS ASSEMBLY magazines.

The bulletin board — the URL is www.theprintedcircuitboard.com — is open to anyone in the industry. We’ve set up categories for PCB design, fabrication, assembly, market data, trade shows and press releases. Members are invited to create their own topics (threads) for discussing anything industry related that they have on their mind.

We also are happy to announce an agreement with the IPC Designers Council to offer Board Talk as a communications center for news, announcements and meetings, plus information on the Designers Certification program.

Please check it out!

Living La Via Loca

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I got an email a few weeks back from one of our customers who is with a semiconductor manufacturer for whom we make evaluation boards.  He asked some good questions that I answered, of course, and I thought this information may be useful to others, too.  Here is what his email said:

Hi Judy, We received the boards today… and they look gorgeous!  And of course it leads to a question….. not a negative, not an “inquiry” style question….

One thing that caught my eye was how “flush” the board surfaces were.  I wasn’t able to identify a single via on the front or back surfaces of the board…. and (education time) I had an Apps Engr point out that I could see the via plugs by looking at the edge of the EVB.  So I want to understand more about the via fill process, and whether there are different options that influence cost and lead time.

I will share with you my brief answers, which are not overly technical. However, I will follow my comments with a link to a very good in-depth paper from Michael Carano of the Electronics Division of the OM Group on this subject. Unfortunately once you start talking about via filling and plugging it is a bit like opening a big can of worms!

First of all, a semantics lesson:  There are two methods of filling via holes—one is via “filling” and the other is via “plugging.” Via hole filling refers to the non-planer filling of plated through-holes. Via hole plugging refers to the planarization of blind and buried vias, as well as through holes. Via hole plugging pertains to HDI and microvia designs.

(In the case of the above customer they requested the through-hole vias to be plugged with conductive  ink that would facilitate a connection from the front to back sides).

Once the conductive ink has been applied to the holes, the conductive ink must be cured. After curing some of the cured material will protrude from the holes leaving a small bump or “nail-head.” At this point the board must be “brushed” to flatten this protruding bump, with micro precision, to remove the excess material without removing any material from within the via hole. The brushing process must not damage the knee of any unplugged holes. This requires the use of a very flat working surface and special brushes. In some cases there may need to be an additional final cure for hardness. (UV)

Getting back to our customer, we took all these steps to properly fill, cure and planarize the plugged vias. Afterwards, these boards went through final outer layer pattern plating, which further erased any evidence that the plugged vias were present.  This made it impossible for our customer to detect any sign of the plugged vias (unless they peered through the side of the board into the substrate where they could see the front to back plugs). I think they were a little worried we forget to plug them at first glance!

As far as how filling verses plugging vias influences cost and lead time—the HDI via filling does take some extra time and TLC and thus raises the cost, and may or may not affect the lead time. Usually you must allow for one full day to complete the via plugging process.  Obviously if you need a quick turn, the lead time would be affected. However, if the lead time was standard, it probably wouldn’t make much of a difference. It stands to reason that the quantity also comes into play in regards to time and cost.

Thank you, Bill for asking these questions—they were good ones! We appreciate your kind words and commitment to our partnership. We are thrilled you think our boards are “gorgeous!”

I would also like to thank Michael Carano for his expertise and outstanding paper on the subject of filling and plugging vias that can be found here: http://www.electrochemicals.com/viafill07.pdf

Whose Fault Is It, Anyway?

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The change in administration at IPC will inevitably dredge up lots of the past as various factions position themselves for a seat at the table.

Those whom hew to the line that IPC’s emphasis over the past decade has shifted to the assembly market are correct: IPC followed the money, and since the massive shift of printed circuit board fabrication to Asia starting in late 2001, assembly has where the North American money has been.

But that assessment  just as inevitably turns to anger and blame — fingers get quickly pointed at IPC for somehow failing the domestic PCB market. I’m not sure that’s justified.

IPC’s interest in programs for fabricators has waned; of that, there is no doubt. But it has waned in large part because fabricators themselves stopped supporting those programs. The PWB Presidents Meetings and the TMRC are shells of their former selves, it says here, because the members stopped forcing the issue. Keep in mind, IPC has long followed a “build it and they will come” model. That’s not a good strategy for a trade association. But fabricators who abdicated leadership over the IPC share much of the responsibility for what it’s become. It’s not that the IPC board of directors no longer reflects the needs of small guys so much as it’s that the board no longer reflects the needs of the private owner, large or small. No one complained IPC wasn’t doing enough for fabricators when representatives from large fabs like Photocircuits were on the board.

Could IPC provide better direction for the North American fabrication industry? Yes. But the Chinese have done just fine without the help of a strong domestic association. Given that, it’s hard to argue that IPC was the cause of the decline. Back in 2000, when the forecasts for high layer count boards were staggeringly optimistic for the foreseeable future, old friend Jack Fisher lamented that it would keep the domestic industry from investing in HDI for another couple years. He was right: none did. Then the bottom fell out, and none of them had the cash to invest in the newer technology, thus relegating them to third tier status. As one who participated in the IPC Technology Roadmap going back to its first incarnation, I can say microvias were clearly expected to take hold. In that respect, the IPC did its part; the industry just didn’t follow.

It’s uncomfortable to admit we got beat, and no, the playing field with China has never been level, and yes, IPC’s lobbying and related activities have been confused and ineffective, but there’s plenty of blame to go around, and not all of it was a trade group’s fault. We’d all be better off, I think, to focus on the needs of the future rather than the sins of the past.

A New Trend in Assembly Shows?

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Years ago, three major events dotted the US electronics assembly trade show landscape. They included Nepcon East, Surface Mount International, and the mother of them all, Nepcon West.

While Nepcon West was the undisputed champ, all three shows were worth attending, and exhibitors often made new product announcements at each one.

Interestingly, and for reasons too detailed to get into here, none of those shows exist today. And for much of the 2000s, the place to roll out new products became IPC’s Apex. Other events were relegated to regional status, and traditionally were staffed as much by distributors as by OEMs.

There’s a few small signs that trend may be shifting again. While IPC Midwest, taking place this week in the Chicago suburbs remains a local show (and honestly, could they make seeing the exhibitor list any more user-unfriendly?), SMTAI is at long-last beginning to fill the niche for a seasonal alternative to Apex. To wit, we’ve received numerous press releases of late reporting new products to be introduced at SMTAI. That’s evidence suppliers see the venue as a viable place to make product launches.

Also at SMTAI, on Oct. 18, I am cochairing (with CIRCUITS ASSEMBLY columnist Sue Mucha) a panel titled “Global Strategies for Lowering EMS Costs” at SMTAI in Ft. Worth, TX. Topics include EMS in Eastern Europe; networking technical trends; improving quality, delivery and cost in high mix manufacturing; and vapor phase technology, and feature speakers from Kimball, Tailyn, Fabrinet and IBL Technologies. We conclude with a panel on building an EMS cost model.

I can’t mention these events without touting our own. Next week marks the 20th annual PCB West conference and exhibition at the Santa Clara (CA) Convention Center. Traditionally the industry’s leading conference for printed circuit board design and fabrication, we have beefed up the electronics assembly side (with a big assist from the Silicon Valley SMTA Chapter). Highlights include papers on low silver solder alloys, advanced packaging, new plasma-based PCB surface finishes, and lead-free electronics risk reduction, presented by such leading companies as Hewlett-Packard and Amkor. Check out the program at pcbwest.com.  We really hope to see you there.